I use \lstinputlisting to input some vhdl codes, but I only want some code display in the document. So I try to use \begin{comment} \end{comment}, but I failed.
Maybe there are some ways to solve this question.
\lstinputlisting[first=..., last=...] may be not a good solution.

Code: Select all
-- VHDL source assignment
library ieee;
use ieee.std_logic_1164.all;
use std.textio.all;
use work.text_util.all;
entity assignment is
--port(a,b:in integer);
end;
-- architecture example
architecture one of assignment is
signal a,b:integer;
begin
assign_var:process
variable a,b:integer;
begin
-- (*@ \begin{comment}
print(output,"var");
print(output,"var-a:");
print(output,str(a));
print(output,"var-b:");
print(output,str(b));
print(output,"first assignment");
--\end{comment} @*)
a := 4;
b := 5;
-- (*@ \begin{comment}
print(output,"var-a:");
print(output,str(a));
print(output,"var-b:");
print(output,str(b));
print(output,"assignment");
--\end{comment} @*)
a := b;
b := a;
-- (*@ \begin{comment}
print(output,"var-a:");
print(output,str(a));
print(output,"var-b:");
print(output,str(b));
--\end{comment} @*)
wait;
end process;
--(*@ $
assign_signal:process
--$@*)
begin
wait for 6 ns;
-- (*@ \begin{comment}
print(output,"sig");
--\end{comment} @*)
a <= 4;
b <= 5;
-- (*@ \begin{comment}
print(output,"sig-a:");
print(output,str(a));
print(output,"sig-b:");
print(output,str(b));
print(output,"first assignment");
--\end{comment} @*)
wait for 2 ns;
-- (*@ \begin{comment}
print(output,"sig-a:");
print(output,str(a));
print(output,"sig-b:");
print(output,str(b));
print(output,"assignment");
--\end{comment} @*)
a <= b;
b <= a;
wait for 2 ns;
-- (*@ \begin{comment}
print(output,"sig-a:");
print(output,str(a));
print(output,"sig-b:");
print(output,str(b));
--\end{comment} @*)
wait;
end process;
end;